High dynamic range cmos pixel and method of operating same
AssigneeSRI International
InventorsPeter Alan Levine, Rui Zhu
Life of this patent
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Abstract
A method of operating a CMOS pixel is disclosed. The CMOS pixel includes a photodiode (PPD), a transfer gate coupled to the PPD, and an anti-blooming drain coupled to the transfer gate. A potential barrier is formed between a potential well underlying the PPD and the transfer gate. Charge is accumulated in the potential well in response to electromagnetic radiation during a first integration time. Excess charge is removed from the potential well to the anti-blooming drain that exceeds the first potential barrier. A size of the potential barrier is increased. Charge is accumulated in the potential well during a second integration time.
Claims19
A method of operating a CMOS pixel, wherein the CMOS pixel comprises a photodiode (PPD), a transfer gate coupled to the PPD, and an anti-blooming drain coupled to the transfer gate, the method comprising:
- forming a potential barrier between a potential well and the transfer gate;
- accumulating charge in the potential well in response to electromagnetic radiation during a first integration time;
- removing excess charge from the potential well to the anti-blooming drain that exceeds the potential barrier;
- increasing a size of the potential barrier;
- and
- accumulating charge in the potential well during a second integration time.
A method of operating a CMOS pixel, wherein the CMOS pixel comprises a photodiode (PPD), a transfer gate coupled to the PPD, and an anti-blooming drain coupled to the transfer gate, the method comprising:
- (a) coupling a capacitor to the sense node;
- (b) forming a potential barrier between a potential well underlying the PPD and the transfer gate;
- (c) accumulating charge in the potential well in response to electromagnetic radiation during a first integration time;
- (d) removing excess charge from the potential well to the anti-blooming drain that exceeds the first potential barrier;
- (e) increasing a size of the potential barrier;
- (f) accumulating charge in the potential well during a second integration time;
- and
- (g) decoupling the capacitor from the sense node.
Dependencies are inferred from the claim text.