Back to results
US 2012/0049325 A1Published application
Integrated circuit having a semiconductor arrangement and method for producing it
AssigneeInfineon Technologies Austria AG
InventorGerhard Schmidt
Life of this patent
Estimating the term…
Abstract
An integrated circuit having a semiconductor component arrangement and production method is disclosed. In one embodiment, an oxide layer region is provided as a protection against oxidation in the edge region on the surface region of an underlying semiconductor material region.
Claims27
An integrated circuit having a semiconductor component arrangement comprising:
- a semiconductor material region having a surface region;
- an arrangement of one or more semiconductor components is formed in a central region of the semiconductor material region;
- a passivation layer region formed on the surface region in an edge region, the passivation layer region being configured to realize a field distribution at the edge of the semiconductor component arrangement;
- and wherein
- the passivation layer region is formed with a base layer including hydrogen containing amorphous carbon at the bottom and directly adjoining the semiconductor material region;
- an oxide layer region is provided as a protection against oxidation on and in direct contact with the surface region of the semiconductor material region in the edge region;
- the passivation layer region is formed between the oxide layer region and the central region;
- the oxide layer region or a part of the oxide layer region is formed in direct contact with one or more channel stopper regions, a channel stopper region being formed as a doped zone or as a plurality of doped zones of a first conductivity type in the surface region of the semiconductor material region;
- and
- a doped zone or a VLD zone having a varying doping of a second conductivity type, namely one that decreases toward the edge of the semiconductor material region, is formed in the surface region of the semiconductor material region in the transition between the central region and the edge region of the semiconductor material region, the doped zone or VLD zone reaching as far as the one or more channel stopper regions.
7 more elements
A method for producing an integrated circuit having a semiconductor component arrangement, comprising:
- forming a semiconductor material region having a surface region;
- forming an arrangement of one or more semiconductor components in a central region of the semiconductor material region;
- forming a passivation layer region on the surface region of the semiconductor material region in an edge region thereof, the passivation layer region being configured to realize a field distribution at the edge of the semiconductor component arrangement, wherein the passivation layer region is formed with a base layer including hydrogen containing amorphous carbon at the bottom and directly adjoining the semiconductor material region;
- forming an oxide layer region as a protection against oxidation on and in direct contact with the surface region of the semiconductor material region in the edge region;
- forming the passivation layer region between the oxide layer region and the central region;
- forming the oxide layer region or a part of the oxide layer region in direct contact with one or more channel stopper regions, a channel stopper region being formed as a doped zone or as a plurality of doped zones of a first conductivity type in the surface region of the semiconductor material region;
- and
- forming a doped zone or a VLD zone having a varying doping of a second conductivity type, namely one that decreases toward the edge of the semiconductor material region, in the surface region of the semiconductor material region in the transition between the central region and the edge region of the semiconductor material region, the doped zone or VLD zone reaching as far as the one or more channel stopper regions.
5 more elements
Dependencies are inferred from the claim text.