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US 2012/0032348 A1Published application
Three-dimensional integrated circuits with protection layers
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChen-Hua Yu, Wen-Chih Chiou, Weng-Jin Wu, Hung-Jung Tu, Ku-Feng Yang
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Abstract
A semiconductor structure includes a first die comprising a first substrate and a first bonding pad over the first substrate, a second die having a first surface and a second surface opposite the first surface, wherein the second die is stacked on the first die and a protection layer having a vertical portion on a sidewall of the second die, and a horizontal portion extending over the first die.
Claims20
A semiconductor structure comprising:
- a wafer;
- a first die and a second die stacked over the wafer;
- a protection layer in a space between the first die and the second die, wherein the protection layer comprises:
- a bottom portion at a bottom of the space;
- and
- vertical portions over and connected to opposite ends of the bottom portion, wherein the vertical portions are on sidewalls of the first die and the second die;
- and
- a coating over the bottom portion of the protection layer and filling the space.
5 more elements
A semiconductor structure comprising:
- a wafer comprising a first die and a second die, each comprising:
- a first substrate;
- and
- a first bonding pad on a top surface of the first substrate;
- a third die and a fourth die each having a first surface and a second surface opposite the first surface, wherein the third die is stacked on the first die, and the fourth die is stacked on the second die, and wherein the third die and the fourth die each comprise:
- a second substrate;
- an active device in the second substrate;
- an interconnect structure over the second substrate;
- a second bonding pad on the first surface and connected to the interconnect structure, wherein the second bonding pad of the third die is bonded to the first bonding pad of the first die, and wherein the second bonding pad of the fourth die is bonded to the first bonding pad of the second die;
- and
- a contact pad on the second surface and electrically connected to the second bonding pad;
- a protection layer in a space between the third die and the fourth die, wherein the protection layer has vertical portions on sidewalls of the third die and the fourth die, and a horizontal portion extending from over the first die to over the second die;
- and
- a coating on the protection layer and filling a remaining space between the third and the fourth dies.
11 more elements
A semiconductor structure comprising:
- a supporter free from active devices, the supporter comprising:
- a first substrate;
- and
- a first bonding pad over the first substrate;
- a die having a first surface and a second surface opposite the first surface, wherein the die is stacked on the supporter, the die comprising:
- a second substrate;
- an active device in the second substrate;
- an interconnect structure over the second substrate;
- a second bonding pad on the first surface and connected to the interconnect structure, wherein the second bonding pad is bonded to the first bonding pad of the supporter;
- and
- a contact pad on the second surface and electrically connected to the second bonding pad;
- and
- a protection layer having a vertical portion on a sidewall of the die, and a horizontal portion extending over the supporter.
10 more elements
Dependencies are inferred from the claim text.