Semiconductor memory device and manufacturing method thereof
AssigneeKabushiki Kaisha Toshiba
InventorsAtsuhiro Sato, Fumitaka Arai
Life of this patent
Estimating the term…
Loading patent…
AssigneeKabushiki Kaisha Toshiba
InventorsAtsuhiro Sato, Fumitaka Arai
Estimating the term…
This semiconductor memory device comprises a semiconductor substrate, a plurality of tunnel insulator films formed on the semiconductor substrate along a first direction and a second direction orthogonal to the first direction with certain spaces in each directions, a plurality of charge accumulation layers formed on the plurality of tunnel insulator films, respectively, a plurality of element isolation regions formed on the semiconductor substrate, the plurality of element isolation regions including a plurality of trenches formed along the first direction between the plurality of tunnel insulator films, a plurality of element isolation films filled in the plurality of trenches, a plurality of inter poly insulator films formed over the plurality of element isolation regions and on the upper surface and side surfaces of the plurality of charge accumulation layer along the second direction in a stripe shape, a plurality of air gaps formed between the plurality of element isolation films filled in the plurality of trenches and the plurality of inter poly insulator films and a plurality of control gate electrodes formed on the plurality of inter poly insulator films.
A method of manufacturing a semiconductor memory device comprising:
A method of manufacturing a semiconductor memory device comprising:
A method of manufacturing a semiconductor memory device comprising:
Dependencies are inferred from the claim text.