Methods for fabricating phase change memory devices

A method for fabricating a phase change memory device, comprising:

• forming a plurality of bottom electrodes on a substrate;
• forming an isolation mold layer on the substrate to extend in parallel with the bottom electrodes;
• forming a plurality of trenches to pass through the isolation mold layer and selectively expose parts of the bottom electrodes;
• forming a phase change material pattern to fill the trenches, the phase change material pattern extending in the first direction to be connected to the parts of the bottom electrodes;
• dividing the phase change material pattern to form a plurality of phase change layers corresponding to the bottom electrodes in one-to-one correspondence;
• and
• forming a plurality of top electrodes on the phase change layers in a self-aligned fashion.

A method for fabricating a phase change memory device, comprising:

• forming a first interlayer dielectric on a semiconductor substrate having a plurality of wordlines formed thereon;
• forming a plurality of through holes in the first interlayer dielectric exposing the word lines;
• forming diodes on each of the word lines and contact plugs on each of the diodes in each of the through holes of the first interlayer dielectric;
• forming a first insulating layer having a first opening on the first interlayer dielectric to expose the contact plugs;
• sequentially forming a conductive layer and a second insulating layer on the first insulating layer;
• patterning the conductive layer to form a spacer electrode having an L-shape or a step shape which contacts a portion of the contact plugs;
• performing a trim pattern process on a the spacer electrode to form a plurality of bottom electrodes having a linear plane defined on the diodes and an L-shape or a stepped shaped section connected to about half a top surface of the contact plugs and forming a plurality of openings between the bottom electrodes exposing the first insulating layer;
• filling the openings between the bottom electrodes with an insulating material to form a third insulating layer between the plurality of bottom electrodes;
• forming an etch stop layer on the first, second and third insulating layers and the bottom electrodes;
• forming a first mold layer in between the bottom electrodes in the shape of a line and including a first trench formed therein and extending in a first direction;
• forming a second mold layer on the semiconductor substrate crossing the first mold layer and including a second trench formed therein which exposes the bottom electrodes and extending in a second direction orthogonal to the first direction;
• conformally forming phase change material layers along profiles of the first trench and the second trench;
• depositing a gap-fill insulating layer on the phase change material layers;
• planarizing the phase change material layers and the gap-fill insulating layer to form a plurality of planarized phase change material patterns;
• recessing the phase change material patterns to form phase change layers having a U-shape and recessed regions at the first and second trenches;
• and
• forming top electrodes at the recessed regions in a self-aligned fashion with respect to the phase change layers having a U-shape.