Built-in self-test circuitry
AssigneeSTMicroelectronics (Grenoble 2) SAS
InventorHervé Le-Gall
Life of this patent
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Abstract
A method of generating at least one test sequence for testing a data connection, the method involving selectively combining by a logic function (206) the output sequences of a plurality of pseudo-random bit sequence (PRBS) generators (202, 204), each generator having a specific number of states that is different from those of the other generators.
Claims16
A method of generating at least one test sequence for testing a data connection, the method comprising selectively combining by a logic function the output sequences of a plurality of pseudo-random bit sequence (PRBS) generators, each generator having a specific number of states that is different from those of the other generators.
Circuitry for generating at least one test sequence for testing a data connection, the circuitry comprising combining logic arranged to selectively combine output sequences of a plurality of PRBS generators, wherein the plurality of PRBS generators are n-bit generators each having a value of n different to the value of ti of each of the other generators.
Dependencies are inferred from the claim text.