Quality of service aware rate throttling of delay tolerant traffic for energy efficient routing

A rate controllable network processor, comprising:

• a plurality of packet processing engines;
• a rate estimator for determining from a flow of IP packets received by the network processor:
• an aggregate rate of time critical flows received by the network processor, and
• an aggregate minimum rate that will meet respective quality of service requirements of delay tolerant flows received by the network processor;
• a rate controller for determining a respective minimum processing rate for each packet processing engine such that a summation of the minimum processing rates is greater than or equal to a summation of the aggregate rate of time critical flows and the aggregate minimum rate;
• and
• a dispatcher for scheduling processing of the delay tolerant flows by the packet processing engines to meet the respective quality of service requirements of the delay tolerant flows,
• wherein each packet processing engine is operable to process packets at its respective minimum processing rate.

A controller for a network processor having a plurality of packet processing engines, comprising:

• a rate estimator for determining from a flow of IP packets received by the network processor:
• an aggregate rate of time critical flows received by the network processor, and
• an aggregate minimum rate that will meet respective quality of service requirements of delay tolerant flows received by the network processor;
• a rate controller for determining a respective minimum processing rate for each packet processing engine such that a summation of the minimum processing rates is greater than or equal to a summation of the aggregate rate of time critical flows and the aggregate minimum rate;
• and
• a dispatcher for scheduling processing of the delay tolerant flows by the packet processing engines to meet the respective quality of service requirements of the delay tolerant flows.