Power saving memory apparatus, systems, and methods
AssigneeMicron Technology, Inc.
InventorsYutaka Ito, Masayoshi Nomura, Keiichiro Abe
Life of this patent
Estimating the term…
Abstract
Some embodiments include a voltage generator to generate a voltage to apply to a line used to access a memory cell of a memory device in which the voltage is applied to the line when the memory cell is not being accessed, and a power controller to cause the voltage to change during a time interval after a refresh operation of the memory device. Other embodiments including additional apparatus, systems, and methods are disclosed.
Claims35
An apparatus comprising:
- a first voltage generator to generate first voltage to apply to a line used to access a memory cell of a memory device, wherein the voltage is applied to the line when the memory cell is not being accessed;
- a second voltage generator to generate a second voltage to apply to a line used to transfer data with the memory cell;
- and
- a power controller to cause the first voltage to change during a time interval after a refresh operation of the memory device and to cause the second voltage to increase in value after the refresh operation.
An apparatus comprising:
- a first voltage generator to generate a first voltage to apply to a line used to access a memory cell of a memory device, wherein the first voltage is applied to the line when the memory cell is not being accessed;
- a second voltage generator to generate a second voltage to apply to the line when the memory cell is being accessed;
- a third voltage generator to generate a third voltage to apply to a line used to transfer data with the memory cell;
- a driver to selectively apply at least one of the first and second voltages to the line;
- and
- a power controller to cause the first voltage generator to increase a value of the first voltage during a time interval after a refresh operation of the memory device, to cause the second voltage generator to reduce a value of the second voltage during the time interval after the refresh operation, and to cause the third voltage generator to increase a value of the third voltage after the refresh operation.
The apparatus of claim 24, wherein the fourth voltage generator is to increase the value of the fourth voltage to approximately a ground potential.
A method comprising:
- generating a voltage to apply to a line used to access a memory cell of a memory device, wherein the first voltage is applied to the line when the memory cell is not being accessed;
- changing the first voltage during a time interval after a refresh operation of the memory device;
- generating a second to apply to a line used to transfer data with the memory cell of a memory device;
- and
- increasing a value of the second voltage after the refresh operation.
A method comprising:
- increasing a value of a first voltage to a ground potential during a time interval after a refresh operation of the memory device, wherein the first voltage is to be applied to a line used to access a memory cell of a memory device when the memory cell is not being accessed;
- reducing a value of a second voltage during the time interval after the refresh operation, wherein the second voltage is to be applied to the line when the memory cell is being accessed;
- and
- increasing a value of a third voltage after the refresh operation, wherein the third voltage is to be applied to a line used to transfer data with the memory cell.
Dependencies are inferred from the claim text.