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US 2011/0299333 A1Published application
Non-volatile memory programming
AssigneeMicron Technology, Inc.
InventorsViolante Moschiano, Giovanni Santin
Life of this patent
Estimating the term…
Abstract
Some embodiments include a memory device and a method of programming memory cells of the memory device. One such method includes applying different voltages to data lines associated with different memory cells based on threshold voltages of the memory cells in an erased state. Other embodiments including additional memory devices and methods are described.
Claims26
A method comprising:
- applying a voltage to a data line associated with a memory cell to be programmed, the voltage having a first value if the memory cell is being programmed from an erased state to a programmed state and if a threshold voltage value of the memory cell in the erased state is less than a verify voltage value, the voltage having a second value if the memory cell is being programmed from the erased state to the programmed state and if the threshold voltage value of the memory cell in the erased state is greater than the verify voltage value.
A method comprising:
- applying a first voltage to a first data line associated with a first memory cell if the first memory cell is being programmed from an erased state to a first programmed state and if a threshold voltage value of the first memory cell in the erased state is less than a verify voltage value;
- applying a second voltage to a second data line associated with a second memory cell if the second memory cell is being programmed from the erased state to the first programmed state and if the threshold voltage value of the second memory cell in the erased state is greater than the verify voltage;
- and
- applying a third voltage to a third data line associated with a third memory cell if the third memory cell is being programmed from the erased state to a second programmed state.
1 more element
A method comprising:
- applying a first voltage to a first data line associated with a first memory cell if the first memory cell is being programmed from an erased state to a first programmed state;
- applying a second voltage to a second data line associated with a second memory cell if the second memory cell is being programmed from the erased state to a second programmed state;
- and
- applying a third voltage to a third data line associated with a third memory cell if the third memory cell is being programmed from the erased state to a third programmed state.
1 more element
An apparatus comprising:
- memory cells;
- and
- a module configured to apply a voltage to a data line associated with a memory cell included in the memory cells during programming of the memory cell, the voltage having a first value if the memory cell is being programmed from an erased state to a programmed state and if a threshold voltage value of the memory cell in the erased state is less than a verify voltage value, the voltage having a second value if the memory cell is being programmed from the erased state to the programmed state and if the threshold voltage value of the memory cell in the erased state is greater than the verify voltage value.
An apparatus comprising:
- a first memory cell, a second memory cell, and a third memory cell;
- and
- a module configured to:
- apply a first voltage to a first data line associated with the first memory cell if the first memory cell is being programmed from an erased state to a first programmed state;
- apply a second voltage to a second data line associated with the second memory cell if the second memory cell is being programmed from the erased state to a second programmed state;
- and
- apply a third voltage to a third data line associated with the third memory cell if the third memory cell is being programmed from the erased state to a third programmed state.
4 more elements
Dependencies are inferred from the claim text.