Semiconductor memory cell and manufacturing method thereof, and semiconductor memory devices

A semiconductor memory device, comprising:

• a plurality of semiconductor memory cells arranged in an array, wherein
• each of the semiconductor memory cells is configured so that a memory element formed by a first field effect transistor having a gate insulating film made of a ferroelectric film is connected in parallel with a select switching element formed by a second field effect transistor having a gate insulating film made of a paraelectric film,
• the semiconductor memory cell located at one end of the semiconductor memory cells connected in a column direction is connected to a source line having a ground potential, and the semiconductor memory cell located at the other end thereof is connected to a bit line to which a write voltage is applied,
• write operation to the semiconductor memory cells connected in a row direction is performed sequentially from a row located closer to the source line to a row located closer to the bit line, after reset operation is performed so as to orient polarization of the ferroelectric film of the memory elements in all the semiconductor memory cells in a same direction, and
• when writing data to each of the semiconductor memory cells in a selected row, the select switching element is turned off, if the write operation is to be performed so as to turn a polarization state of the ferroelectric film of the memory element to an off state of the first field effect transistor.