An apparatus for providing a power output proportional to a source signal, the source signal having a source frequency, the apparatus comprising:
- a phase modulator structured to generate first and second carrier signals each having substantially identical carrier waveforms, carrier frequencies, and duty cycles, the first and second carrier signals having a relative phase difference, the phase modulator further structured to modulate the first and second carrier signals by the source signal and output first and second modulated carrier signals;
- an upper transformer and a lower transformer, the upper transformer having an upper transformer primary winding and an upper transformer secondary winding and the lower transformer having a lower transformer primary winding and a lower transformer secondary winding, the upper and lower transformers structured to be substantially electromagnetically identical to one another and to provide electrical isolation between primary and secondary stages of the apparatus;
- an upper power driver circuit structured to be driven by the first modulated carrier signal and drawing power from a DC supply to output a powered modulated carrier signal to the upper transformer primary winding, the upper power driver circuit operably coupled to an upper resonator circuit, the upper power driver circuit structured to operate as a substantially zero-voltage zero-current switching element;
- a lower power driver circuit structured to be driven by the second modulated carrier and drawing power from the DC supply to output a powered modulated carrier signal to the lower transformer primary winding, the lower power driver circuit operably coupled to a lower resonator circuit, the lower power driver circuit structured to operate as a substantially zero-voltage zero-current switching element;
- an upper secondary circuit electrically coupled to the upper transformer secondary winding, the upper secondary circuit winding having an upper rectifier stage electrically coupled to an upper inductor in series with an upper capacitor to form an upper low pass filter having a comer frequency greater than the source frequency and less than the first and second carrier signals, the upper low pass filter further structured to integrate a voltage proportional to the source signal, an upper semiconductor switch coupled to ground and to a first node between the upper inductor and the upper rectifier stage and structured to provide a return path for high-frequency current to ground, an upper output element coupled to a second node between the upper inductor and the upper capacitor;
- a lower secondary circuit coupled to the lower transformer secondary winding, the lower secondary circuit including a lower rectifier stage coupled to a lower inductor in series with a lower capacitor to form a lower low pass filter structured to have a corner frequency substantially greater than the source frequency and less than the first and second carrier signal frequencies, the lower low pass filter further structured to integrate a voltage proportional to the source signal, a lower semiconductor switch coupled to a third node between the lower inductor and the lower rectifier stage and structured to provide a return path for high-frequency current to ground, a lower output element coupled to a fourth node between the lower inductor and lower capacitor;
- wherein the upper and lower inductors are structured to be magnetically coupled to one another, and the upper and lower high-speed semiconductor switches are structured to be physically disposed within a magnetic field generated by the upper and lower inductors such that both the upper and lower high-speed semiconductor switches are structured to operate as substantially zero-voltage zero-current switching elements, with the upper and lower high-speed semiconductor switches structured to conduct at substantially complementary times when controlled by an increase in positive voltage on a respective one of the upper and the lower transformer secondaries;
- and
- output terminals at the upper and lower output elements on which a fully balanced differential output signal is generated.