Real time dynamic optimization of deadtime
AssigneeHoneywell International Inc.
InventorsSONNY LLOYD, NICOLAE MORCOV, MICHAEL ANDREOU, DIKRAN YALDIZCIYAN
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Abstract
A deadtime optimization apparatus and method may determine when it is safe to turn a switch ON, eliminating the need to have a switch controller purposely insert a deadtime period in the algorithm (i.e., it can go back to producing ideal PWM). Since the decision of when it is safe to turn ON the switch may be achieved through measurement, it is expected that the length of time may change for each pulse as the operating conditions change. Therefore, the apparatus and methods of the present invention may take on a dynamic characteristic because the safe to turn ON (STTO) time may vary for each pulse.
Claims20
A conduction detection circuit comprising:
- a pulse width modulator (PWM) capable of generating a pulse;
- an upper and a lower logic circuit each capable of receiving the pulse;
- an upper and lower gate driver capable of receiving an output from the respective upper and lower logic circuits;
- an upper and lower switch capable of receiving a gating signal from the respective upper and lower gate drivers;
- and
- an upper and lower comparator capable of determining the conduction state of the respective upper and lower switches.
A conduction detection circuit comprising:
- a pulse width modulator (PWM) capable of generating a pulse;
- an upper and a lower logic circuit capable of receiving the pulse;
- an upper and lower gate driver capable of receiving an output from the respective upper and lower logic circuits;
- upper and lower IGBTs capable of receiving a gating signal from the respective upper and lower gate drivers;
- and
- an upper and lower comparator capable of determining the conduction state of the respective upper and lower switches,
- wherein the upper and lower logic circuits each determine whether its respective upper and lower IGBT is in a state which will not cause a shoot-through if the respective upper and lower gate driver turns ON, and
- wherein the conduction state of the respective upper and lower switches is selected from the group consisting of IGBT conducting (state 1), diode conducting (state 2), and device off (state 3).
A method for dynamically optimizing deadtime in switching between upper and lower switches, comprising:
- sensing collector-emitter voltage of each of the upper and lower switches;
- determining a conduction state of each of the upper and lower switches based on the sensed collector-emitter voltage;
- determining whether the upper and lower switches are in a state which will not cause a shoot-through if a corresponding gate driver turns the switch ON;
- and
- switching ON one of the upper and lower switches when the switch is not in a state that will cause a shoot-through.
The method of claim 20, wherein the upper and lower logic circuits generate a safe to turn ON (STTO) signal.
Dependencies are inferred from the claim text.