Apparatus and method for disabling well bias
AssigneeSkyworks Solutions, Inc.
InventorsDavid K. Homol, Karl J. Couglar
Life of this patent
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Abstract
Apparatuses and methods for disabling well bias are disclosed. In one embodiment, an apparatus includes a complimentary metal oxide semiconductor (CMOS) switch having a gate, a drain, a source, and a well. The source and drain are formed in the well. The gate is formed adjacent the well between the source and drain, and the source is configured to receive a bias voltage from a power amplifier. The apparatus further includes a well bias control block for biasing the well voltage of the first switch and a disable circuit for disabling the well bias control block so as to prevent the well bias control block from biasing the well. The well bias control block can bias the well voltage of the first switch to at least two voltage levels.
Claims23
An apparatus for disabling a bias voltage for biasing one or more switches, the apparatus comprising:
- a first complimentary metal oxide semiconductor (CMOS) switch having a gate, a drain, a source, and a well, the well having a p-type doping, and the source and drain formed in the well, the gate formed adjacent the well between the source and drain, and the source configured to receive a bias voltage from a power amplifier;
- a well bias control block for biasing the well voltage of the first switch, the well bias control block configured to bias the well voltage of the first switch to at least two voltage levels;
- and
- a disable circuit for disabling the well bias control block so as to prevent the well bias control block from biasing the well.
A method of disabling a bias voltage for biasing one or more CMOS switches, the method comprising:
- disabling a well bias control circuit for biasing a well of a first CMOS switch using a disable circuit;
- enabling a power amplifier for providing a radio frequency signal to a source of the first switch;
- enabling the well bias control circuit using the disable circuit;
- and
- biasing the well of the first switch using the well bias control circuit.
A computer-readable storage medium comprising instructions that when executed by a processor perform a method of disabling a bias voltage for biasing one or more CMOS switches, the method comprising:
- disabling a well bias control circuit for biasing a well of a first CMOS switch;
- enabling a power amplifier for providing a radio frequency signal to a source of the first switch;
- and
- enabling the well bias control circuit.
An apparatus for disabling a bias voltage for biasing one or more switches, the apparatus comprising:
- means for biasing a well of a first switch;
- means for disabling the means for biasing;
- means for enabling a power amplifier configured to provide a radio frequency signal to a source of the first switch;
- and
- means for enabling the means for biasing.
Dependencies are inferred from the claim text.