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US 2011/0298480 A1Published application
Compensation of parasitic capacitances of capacitive sensors
AssigneeDigital Imaging Systems GmbH
InventorsFrank Kronmueller, Horst Knoedgen
Life of this patent
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Abstract
Circuits and methods for compensating the impact of parasitic capacitances on capacitive sensors have been achieved. The charge of a compensation capacitor assigned to each capacitive sensor is used to neutralize the charge of the parasitic capacitor.
Claims23
A method to compensate the impact of parasitic capacitances on capacitive sensors comprising the steps of:
- (1) providing one or more capacitive sensors wherein each sensor having an digital-to-analog converter, parasitic capacitances in parallel, a compensation capacitor, and a parasitic capacitance is present between a signal line of the capacitive sensors and ground;
- (2) charging, driven by clock pulses, the one or more compensation capacitors with a same, but inverted charge as the related parasitic capacitances;
- (3) neutralizing, driven by clock cycles, in a next step charges of the one or to more parasitic capacitances by inverted charges of the correspondent compensation capacitors;
- (4) neutralizing the parasitic capacitance between the signal line and ground by a switch which is also driven by the clock pulses;
- and
- (5) sensing the capacitance of solely the capacitive sensor at output of the circuit, wherein the parasitic capacitances have been compensated in the previous steps.
3 more elements
A circuit to compensate the impact of parasitic capacitances on capacitive sensors comprising:
- one or more capacitive sensors, wherein each sensor with a odd number has its first terminal connected to a positive input signal, each sensor with an even number has its first terminal connected to a negative input signal, and all second terminals are connected to a common signal output, and wherein each sensor comprises:
- a parasitic capacitance in parallel to the capacitive sensor;
- a compensation capacitor having a second terminal connected to the second terminal of its correspondent capacitive sensor and a first terminal to connected to the output of a differential operational amplifier;
- said differential operational amplifier having its positive input connected to ground and its negative input connected to an output of a digital-to-analog converter;
- and
- said digital-to-analog converter having a first terminal connected to the signal input of its capacitive sensor and a second terminal to the output of the operational amplifier;
- a parasitic capacitance between the output of the capacitive sensor and ground;
- and
- a switch in parallel to the parasitic capacitance between the sensor output and ground.
6 more elements
A circuit to compensate the impact of parasitic capacitances on capacitive sensors comprising:
- one or more capacitive sensors, wherein each sensor has its first terminal connected to an output of a correspondent digital-to-analog converter, wherein each digital-to-analog converter with an even number has its input connected to a negative input clock signal, and all second terminals are connected to a common signal output, and wherein each sensor comprises:
- a parasitic capacitance in parallel to the capacitive sensor;
- a compensation capacitor having a second terminal connected via a to third switch to the second terminal of the capacitive sensor and a first terminal connected via a second switch to the output of the digital-to-analog converter;
- said digital-to-analog converter having a second terminal connected to ground;
- said second switch;
- said third switch;
- a fourth switch connected between the second terminal of the compensation capacitor and ground;
- and
- a fifth switch connected between the first terminal of the compensation capacitor and ground;
- a parasitic capacitance between the output of the capacitive sensor and ground;
- and
- a first switch in parallel to the parasitic capacitance between the sensor output and ground.
9 more elements
Dependencies are inferred from the claim text.