Self-aligned contact for trench mosfet

A trench metal oxide semiconductor field effect transistor (MOSFET) structure on a substrate, comprising:

• a first trench, a second trench, and a third trench on the substrate, wherein both the first trench, the second trench, and the third trench are lined with a gate dielectric layer and filled with gate polysilicon;
• a first self-aligned source contact between the first trench and the second trench and a second self-aligned source contact between the second trench and the third trench, wherein both the first and the second self-aligned source contacts are connected to a source metal;
• a gate contact above the first trench, wherein the gate contact is connected to a gate metal and to the gate polysilicon in the first trench;
• and
• a first source region surrounding the first self-aligned source contact and a second source region surrounding the second self-aligned source contact, wherein both the first and the second source regions are convex-shaped.

A method of forming a trench MOSFET on a substrate, comprising:

• etching the substrate to create a plurality of trenches with a hard mask layer;
• lining the plurality of trenches with a gate oxide layer;
• filling the plurality of trenches with doped polysilicon;
• etching back the doped polysilicon in the plurality of trenches to below top surfaces of the trenches;
• depositing a dielectric layer on the substrate after etching back the doped polysilicon, wherein the dielectric layer has a minimal deposition on the sidewalls of the plurality of trenches;
• performing a wet oxide etch to removed the dielectric layer on the sidewalls on the plurality of trenches to expose silicon on the sidewalls of the plurality of trenches;
• performing an isotropic silicon etch to undercut silicon under the hard mask layer, wherein empty regions above the plurality of trenches and regions under the hard mask layer with silicon being undercut with silicon by the isotropic silicon etch form bowl-shaped regions;
• removing the hard mask layer;
• performing source dopant implant on the substrate to form convex-shaped source regions on exposed silicon, wherein the convex-shaped source regions has surfaces following surfaces of the bowl-shaped regions;
• filling the bowl-shaped region with a dielectric layer;
• performing a silicon etch to form self-aligned source contact openings;
• and
• filling the contact plugs with contact metal to form self-aligned contacts.