Memory device transistors
AssigneeMicron Technology, Inc.
InventorSeiichi Aritome
Life of this patent
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Abstract
Method and device embodiments are described for fabricating MOSFET transistors in a semiconductor also containing non-volatile floating gate transistors. MOSFET transistor gate dielectric smiling, or bird's beaks, are adjustable by re-oxidation processing. An additional re-oxidation process is performed by opening a poly-silicon layer prior to forming an inter-poly oxide dielectric provided for the floating gate transistors.
Claims20
A semiconductor device comprising:
- a transistor gate;
- a dielectric partially covering a top surface of the transistor gate to form an aperture to the transistor gate, and extending along lateral edges of the transistor gate;
- and
- a poly-silicon structure in contact with the transistor gate via the aperture to the transistor gate.
A semiconductor device comprising field effect transistors in a periphery area and floating gate transistors in an array area, further comprising:
- a gate oxide located in the periphery and array areas and having a lateral edge;
- a floating gate poly-silicon structure located in the periphery and array areas and positioned on the gate oxide;
- a dielectric partially covering the floating gate poly-silicon structure to form an aperture thereto;
- and
- a control gate poly-silicon structure in the periphery and array areas above the dielectric, the control gate poly-silicon structure being in contact with the floating gate poly-silicon structure via the aperture.
A method of adjusting a break down voltage of a field effect transistor, comprising:
- fabricating a transistor gate disposed vertically over a channel region and separated from the channel region by a gate oxide, wherein the transistor gate has at least one lateral edge that extends outwardly from and circumferentially about a lateral edge of an active area of the field effect transistor;
- forming a dielectric over the transistor gate;
- partially etching the dielectric on the transistor gate to form an aperture thereto;
- and
- forming a poly-silicon structure above the dielectric and in contact with the transistor gate via the aperture.
A method of fabricating a field effect transistor comprising:
- forming a gate oxide in contact with an active area;
- etching the active area to form an active area lateral edge;
- forming a first poly-silicon structure in contact with the gate oxide, the first poly-silicon structure being separated from the etched active area by the gate oxide;
- etching the first poly-silicon structure to provide at least one opening therethrough, the at least one opening being laterally spaced apart from an edge of the active area;
- and
- forming a dielectric in contact with the etched first poly-silicon structure.
Dependencies are inferred from the claim text.