US 2011/0298019 A1 · COMPACT FIELD EFFECT TRANSISTOR WITH COUNTER-ELECTRODE AND FABRICATION METHOD

Abstract

An etching mask, comprising the delineation pattern of the gate electrode, of a source contact, a drain contact and a counter-electrode contact, is formed on a substrate of semi-conductor on insulator type. The substrate is covered by a layer of dielectric material and a gate material. The counter-electrode contact is located in the pattern of the gate electrode. The gate material is etched to define the gate electrode, the source contact and drain contacts and the counter-electrode contact. A part of the support substrate is released through the pattern of the counter-electrode contact area. An electrically conductive material is deposited on the free part of the support substrate to form the counter-electrode contact.

Claims12

Dependent claims

A method for fabricating a field effect transistor comprising the following steps:

providing a substrate comprising successively a support substrate, a dielectric material layer, a layer of semi-conducting material, a layer of gate material, an etching mask wherein the etching mask defines a gate electrode pattern and a counter-electrode contact pattern located inside the gate electrode pattern,
etching the gate material by means of the etching mask so as to define a gate electrode in the gate material and a counter-electrode contact area in the gate material, the counter-electrode contact area being surrounded by the gate electrode,
forming a counter-electrode contact in the support substrate, the counter-electrode contact passing through the gate material by means of the counter-electrode contact area.

Dependencies are inferred from the claim text.

Facts

Application

13/152,630Filed 3 Jun 2011

Priority

FR 10/023583 Jun 2010

Published

8 Dec 2011

Term ends

Not estimatedThe source records don’t support an estimate.

Classification8 codes

H10W 20/069
Of conductive parts of the interconnections: by forming self-aligned vias or self-aligned contact plugs
H10B 10/00
Static random access memory [sram] devices
H10D 30/0323
Comprising silicon, e.g. amorphous silicon or polysilicon: comprising monocrystalline silicon
H10D 30/6734
Multi-gate TFTs: having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs

Compact field effect transistor with counter-electrode and fabrication method

Life of this patent

Compact field effect transistor with counter-electrode and fabrication method

Life of this patent

Abstract

Claims12