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US 2011/0298016 A1Published application
MOSFET having a JFET embedded as a body diode
AssigneePower Integrations, Inc.
InventorsJian Li, Daniel Chang, Ho-Yuan Yu
Life of this patent
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Abstract
A field effect transistor, in accordance with one embodiment, includes a metal-oxide-semiconductor field effect transistor (MOSFET) having a junction field effect transistor (JFET) embedded as a body diode.
Claims18
A field effect transistor comprising:
- a trench gate metal-oxide-semiconductor field effect transistor;
- a first junction field effect transistor embedded as a body diode at a first side of said trench gate metal-oxide-semiconductor field effect transistor;
- and
- a second junction field effect transistor embedded as a body diode at a second side of said trench gate metal-oxide-semiconductor field effect transistor, wherein the second side is opposite of the first side, and the first and second junction field effect transistors are electrically coupled to a source contact.
1 more element
A method of fabricating a field effect transistor comprising:
- depositing a first semiconductor layer upon a substrate, wherein said substrate and first semiconductor layer are doped with a first type of impurity;
- doping a first portion of said first semiconductor layer with a second type of impurity to form a first plurality of well regions;
- doping a second portion of said first semiconductor layer with the second type of impurity to form a second plurality of well regions substantially centered within said first plurality of well regions;
- doping a third portion of said first semiconductor layer with the first type of impurity to form a third plurality of well regions substantially centered within said second plurality of well regions;
- etching a plurality of trenches in said first semiconductor layer substantially centered within said plurality of first, second and third well regions;
- forming a dielectric proximate said plurality of trenches;
- depositing a second semiconductor layer in said plurality of trenches, wherein said second semiconductor layer is doped with the first type of impurity;
- and
- depositing a metal layer, wherein the metal layer electrically couples said first, second and third plurality of well regions and a fourth portion of said first semiconductor layer disposed between said second plurality of well regions.
6 more elements
A method of fabricating a field effect transistor comprising:
- depositing a first semiconductor layer upon a substrate, wherein said substrate and first semiconductor layer are doped with a first type of impurity;
- doping a first portion of said first semiconductor layer with a second type of impurity to form a first plurality of well regions;
- doping a second portion of said first semiconductor layer with the second type of impurity to form a second plurality of well regions within said first plurality of well regions;
- doping a third portion of said first semiconductor layer with the first type of impurity to form a third plurality of well regions within said first plurality of well regions;
- forming a first dielectric layer disposed upon a fourth portion of said first semiconductor layer proximate said first plurality of well regions;
- forming a second semiconductor layer on said first dielectric layer, wherein said second semiconductor layer is doped with the first type of impurity;
- forming a second dielectric layer disposed upon said second semiconductor layer;
- and
- depositing a metal layer, wherein the metal layer electrically couples said first, second and third plurality of well regions and a fourth portion of said first semiconductor layer disposed between said second plurality of well regions.
6 more elements
Dependencies are inferred from the claim text.