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AssigneesGlobalfoundries Inc., International Business Machines Corporation
InventorsBrian J. Greene, William K. Henson, Judson R. Holt, Michael D. Steigerwalt, Kuldeep Amarnath, Rohit Pal, Johan W. Weijtmans
Estimating the term…
A low energy surface is formed by a high temperature anneal of the surfaces of trenches on each side of a gate stack. The material of the semiconductor layer reflows during the high temperature anneal such that the low energy surface is a crystallographic surface that is at a non-orthogonal angle with the surface normal of the semiconductor layer. A lattice mismatched semiconductor material is selectively grown on the semiconductor layer to fill the trenches, thereby forming embedded lattice mismatched semiconductor material portions in source and drain regions of a transistor. The embedded lattice mismatched semiconductor material portions can be in-situ doped without increasing punch-through. Alternately, a combination of intrinsic selective epitaxy and ion implantation can be employed to form deep source and drain regions.
A semiconductor structure comprising:
A method of forming a semiconductor structure comprising:
Dependencies are inferred from the claim text.