Non-Volatile Memory Having 3d Array of Read/Write Elements with Vertical Bit Lines and Laterally Aligned Active Elements and Methods Thereof

A memory including memory elements arranged in a three-dimensional pattern defined by rectangular coordinates having x, y and z-directions and with a plurality of parallel planes stacked in the z-direction over a semiconductor substrate, the memory further comprising:

• a plurality of local bit lines elongated in the z-direction through the plurality of planes and arranged in a two-dimensional rectangular array of bit line pillars having rows in the x-direction and columns in the y-direction;
• a plurality of word lines elongated in the x-direction across individual planes and spaced apart in the y-direction between and separated from the plurality of bit line pillars in the individual planes, wherein the bit line pillars and word lines cross adjacent each other at a plurality of locations across the individual planes;
• a plurality of non-volatile re-programmable memory elements individually connected between the bit line pillars and the word lines adjacent the crossings thereof;
• and wherein
• at each crossing between a bit line pillar and a word line, each non-volatile reprogrammable memory elements further comprises a first layer and a second layer stacked along the y-direction at the crossing with the first layer making electrical contact with a surface of a bit line pillar and the second layer making electrical contact with a surface of a word line.