Integrated circuit device with reduced leakage and method therefor
AssigneeFreescale Semiconductor, Inc.
InventorsPuneet Sharma, Magdy S. Abadir, Scott P. Warrick
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Abstract
A method implemented at a computer aided design tool includes preferentially placing fill regions adjacent to transistors of a first conductivity type for a plurality of standard cell instances of a device design to reduce leakage of the plurality of standard cell instances. Preferentially placing the fill regions includes preferentially placing the fill regions adjacent to transistors of a first conductivity type as compared to placing the fill regions adjacent to transistors of a second conductivity type that is opposite the first conductivity type.
Claims20
A method implemented at a computer aided design tool comprising:
- preferentially placing fill regions adjacent to transistors of a first conductivity type for a plurality of standard cell instances of a device design to reduce leakage of the plurality of standard cell instances, preferentially placing the fill regions comprising preferentially placing the fill regions adjacent to transistors of a first conductivity type as compared to placing the fill regions adjacent to transistors of a second conductivity type that is opposite the first conductivity type.
An integrated circuit data processing device comprising:
- a plurality of standard cell instances, each standard cell instance including a first p-channel transistor and a first n-channel transistor;
- and
- a plurality of fill regions defined within field isolation regions, wherein a majority of the fill regions is in closer physical proximity to p-channel transistors than to n-channel transistors, and wherein each fill region corresponds to a region consisting of an absence of field isolation material.
A computer readable medium embodying a software program, the software program comprising executable instructions configured to manipulate at least one processor to:
- identify transistors of a first conductivity type at instance of standard cells of a device design, the standard cells including transistors of a first conductivity type and transistors of a second conductivity type that is opposite the first conductivity type;
- and
- place fill regions adjacent to transistors of the first conductivity type preferentially, as opposed to placing fill regions adjacent to transistors of the second conductivity type, at locations that reduce leakage of the transistors of the first conductivity type.
Dependencies are inferred from the claim text.