Multiple Deposition, Multiple Treatment Dielectric Layer For A Semiconductor Device

A method, comprising:

• forming a first portion of a gate dielectric layer on a semiconductor substrate;
• performing a first treatment on the first portion of the gate dielectric layer;
• forming a second portion of the gate dielectric layer directly on the treated first portion;
• performing a second treatment on the second portion of the gate dielectric layer, and
• forming a gate electrode on the gate dielectric layer.

A method of semiconductor fabrication, comprising:

• forming a dummy gate structure on a semiconductor substrate;
• forming a source and drain region adjacent the dummy gate structure;
• thereafter, removing the dummy gate structure to form a trench;
• depositing a first portion of a high-k dielectric layer on the semiconductor substrate including in the trench;
• treating the first portion of the high-k dielectric layer;
• depositing a second portion of the high-k dielectric layer on the substrate overlying the treated first portion of the high-k dielectric layer;
• treating the second portion of the high-k dielectric layer;
• and
• forming a metal gate on the treated second portion of the high-k dielectric layer.