Digital Transmitter
AssigneeMassachusetts Institute of Technology
InventorWilliam J. Dally
Life of this patent
Estimating the term…
Abstract
An equalizer provided in a digital transmitter compensates for attenuation in a signal channel to a digital receiver. The equalizer generates signal levels as a logical function of bit history to emphasize transition signal levels relative to repeated signal levels. The preferred equalizer includes an FIR transition filter using a look-up table. Parallel circuits including FIR filters and digital-to-analog converters provide a high speed equalizer with lower speed circuitry. The equalizer is particularly suited to in-cabinet and local area network transmissions where feedback circuitry facilitates adaptive training of the equalizer.
Claims43
A semiconductor device comprising:
- a semiconductor chip;
- a transmitter circuit on the semiconductor chip to receive input bits and to responsively generate a serial output signal having a sequence of signal levels, the input bits having a data rate, and the signal levels having a rate equal to the data rate;
- where
- the transmitter circuit includes a filter having three taps, each tap driven responsive to respective ones of the input bits, and
- the filter is to attenuate signal levels in the serial output signal representing no variation between adjacent input bits relative to variation between the adjacent input bits, such that signal levels in the serial output signal are emphasized for bits that represent transitions in logic level between adjacent ones of the inputs bits relative to bits that do not represent transitions in logic level between the adjacent ones of the input bits.
A semiconductor device, comprising:
- a semiconductor chip;
- a transmitter circuit on the semiconductor chip to receive input bits and to responsively generate a serial output signal having a sequence of signal levels;
- where
- the transmitter circuit includes a filter with three taps,
- each input bit is represented by one signal level only in the serial output signal, and
- the transmitter circuit is to use the filter to emphasize signal levels representing transition in binary state between adjacent input bits, relative to no transition in binary state between adjacent input bits.
A semiconductor device comprising:
- a semiconductor chip;
- a transmitter circuit on the semiconductor chip to receive input bits and to responsively generate a serial output signal having a sequence of signal levels;
- where
- the transmitter circuit includes a filter having three taps, including a tap representing a current one of the input bits to be transmitted, and a tap representing an adjacent, prior input bit in the input bits,
- each input bit is represented by exactly one signal level in the serial output signal, where each signal level has one of at least four possible values, depending on a binary state of a current bit to be transmitted, and depending upon whether an adjacent input bit in the input bits is of the same binary state as the current bit to be transmitted, and
- each signal level is produced by a combination of each tap from the filter, driven responsive to the binary states of corresponding bits from the input bits.
A semiconductor device, comprising:
- a semiconductor chip;
- a transmitter circuit on the semiconductor chip to receive input bits and to responsively generate a serial output signal having a sequence of signal levels;
- where
- the transmitter circuit includes a three tap filter to produce a single signal level in the serial output signal for each bit in the input sequence, each signal level having one four possible values, depending on a value of a current input bit to be transmitted, and depending upon whether an adjacent input bit in the input bits has a common binary state to the current input bit to be transmitted, each tap receiving a different one of the input bits to produce the signal level for the current input bit, each signal level produced responsive to all three taps of the filter.
A semiconductor device comprising:
- a semiconductor chip;
- a transmitter circuit on the semiconductor chip to receive input bits and to responsively generate a serial output signal having a sequence of signal levels, the input bits having a data rate, and the signal levels having a rate equal to the data rate;
- where
- the transmitter circuit includes a filter driven responsive to three respective ones of the input bits, and
- the filter is to attenuate signal levels in the serial output signal representing no variation between adjacent input bits relative to variation between the adjacent input bits, such that signal levels in the serial output signal are emphasized for bits that represent transitions in logic level between adjacent ones of the inputs bits relative to bits that do not represent transitions in logic level between the adjacent ones of the input bits.
Dependencies are inferred from the claim text.