Method And Apparatus For Reconfiguring IC Architectures
AssigneeAlcatel Lucent
InventorsUlrich Heinkel, Joachim Knaeblein, Axel Schneider
Life of this patent
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Abstract
A reconfigurable hardware architecture, in the form of a System-on-Chip 1, includes an ASIC (19) and an embedded FPGA (18) which define static and reconfigurable parts of an IC architecture (15) respectively. Incoming Ethernet, or other format, packets are applied to a packet filter (14), which detects those packets containing reconfiguration data. The reconfiguration data is used to update the FPGA (18).
Claims32
A method for reconfiguring an integrated circuit (IC) architecture, the IC architecture having a static part and a reconfigurable part, including the steps of:
- sending to the IC architecture reconfiguration data contained in reconfiguration packets;
- and
- applying reconfiguration data contained in the reconfiguration packets to reconfigure the reconfigurable part of the IC architecture.
A system including:
- an IC architecture having a static part and a reconfigurable part;
- a packet filter for detecting reconfiguration packets including reconfiguration data;
- and a reconfiguration controller for using the reconfiguration data to reconfigure the reconfigurable part of the IC architecture.
A network comprising a plurality of systems, each system including:
- an IC architecture having a static part and a reconfigurable part;
- a packet filter for detecting reconfiguration packets including reconfiguration data;
- and a reconfiguration controller for using the reconfiguration data to reconfigure the reconfigurable part of the IC architecture;
- and the network further comprising means for forming reconfiguration packets;
- and a distributor for distributing the reconfiguration packets to the systems.
Dependencies are inferred from the claim text.