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US 2011/0255356 A1Published application
Semiconductor memory device and operation method thereof
AssigneeHynix Semiconductor Inc.
InventorsSun-Hyuck Yon, Kee-Teok Park
Life of this patent
Estimating the term…
Abstract
A semiconductor memory device includes a clock synchronizing unit for receiving a first power voltage through a first power voltage terminal, and an additional power voltage providing unit for additionally providing a second power voltage to the first power voltage terminal for a predetermined period after leaving a power down mode.
Claims8
A method for driving a semiconductor memory device with a power down mode, the method comprising:
- receiving a first power voltage through a first power voltage terminal in a normal mode to drive a clock synchronization circuit;
- and
- additionally providing a second power voltage to the first power voltage terminal for a predetermined period after leaving the power down mode.
Dependencies are inferred from the claim text.