Semiconductor test method and semiconductor test system

A semiconductor test system configured to perform electrical tests with a plurality of test items on each of the same type of semiconductor devices formed on a semiconductor wafer by using semiconductor test equipment, the plurality of test items being divided into M (M is an integer greater than or equal to 2) test item groups, the M test item groups comprising a test item group that can be performed using a predetermined number of pins of the semiconductor test equipment and M−1 test item groups that can be performed using a certain number of pins of the semiconductor test equipment, the certain number being smaller than the predetermined number, the semiconductor test system comprising:

• a probe card configured to measure M×N devices (N is a positive integer), the probe card comprising a plurality of probes that can electrically come into contact with M×N semiconductor devices, pin connections for testing N semiconductor devices for each test item group being performed between the semiconductor test equipment and the plurality of probes;
• and
• probing equipment configured to perform an index operation of a unit of N, N being the number of the semiconductor devices on which one test item group is performed at the same time;
• wherein
• the semiconductor test equipment performs tests of the test item groups at the same time.

A semiconductor test system configured to perform electrical tests with a plurality of test items on each of the same type of semiconductor devices by using semiconductor test equipment, the plurality of test items being divided into M (M is an integer greater than or equal to 2) test item groups, the M test item groups comprising a test item group that can be performed using a predetermined number of pins of the semiconductor test equipment and M−1 test item groups that can be performed using a certain number of pins of the semiconductor test equipment, the certain number being smaller than the predetermined number, the semiconductor test system comprising:

• a test board configured to measure M×N devices (N is a positive integer), the test board comprising a plurality of terminals that can electrically come into contact with M×N semiconductor devices, pin connections for testing N semiconductor devices for each test item group being made between the semiconductor test equipment and the plurality of terminals;
• and
• handling equipment configured to perform handling of the semiconductor devices for a unit of N, N being the number of the semiconductor devices on which one test item group is performed at the same time;
• wherein
• the semiconductor test equipment performs tests of the test item groups at the same time.