Stacked semiconductor package
AssigneeHynix Semiconductor Inc.
InventorJong Hoon KIM
Life of this patent
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Abstract
A stacked semiconductor package provides an enhanced data storage capacity along with an improved data processing speed. The stacked semiconductor package includes a substrate having chip selection pads and a connection pad; a semiconductor chip module including a plurality of semiconductor chips including data bonding pads, a chip selection bonding pad, and data redistributions electrically connected with the data bonding pads and a data through electrode passing through the data bonding pad and connected with the data redistribution, the semiconductor chips being stacked so as to expose the chip selection bonding pad; and a conductive wire for connecting electrically the chip selection pad and the chip selection bonding pads.
Claims6
A stacked semiconductor package, comprising:
- a substrate having a connection pad and chip selection pad;
- a plurality of semiconductor chips stacked over the substrate, each semiconductor chip having data bonding pads and chip selection bonding pads disposed over an edge thereof;
- a spacer interposed between each pair of adjacent semiconductor chips and spacing each pair of adjacent semiconductor chips apart from each other;
- through electrodes passing through the semiconductor chips and electrically connecting the data bonding pads to the connection pad;
- and
- a conductive wire for connecting electrically the chip selection pad and the chip selection bonding pads.
Dependencies are inferred from the claim text.