Non-volatile memory devices

A nonvolatile memory device comprising:

• a plurality of parallel active regions defined by a plurality of device isolation layers formed on a semiconductor substrate, each of the plurality of parallel active regions extending in a first direction and having a top surface and sidewalls;
• a plurality of parallel word lines extending in a second direction and crossing over the plurality of parallel active regions at intersecting locations;
• and
• a plurality of charge storage layers disposed at the intersecting locations between the plurality of parallel active regions and the plurality of parallel word lines;
• wherein the intersecting locations comprise first and second sides parallel to the second direction and having a first length, and comprising third and fourth sides parallel to the first direction and having a second length that is greater than the first length.

A nonvolatile memory device comprising:

• a plurality of parallel active regions defined by a plurality of device isolation layers formed on a semiconductor substrate, each of the plurality of parallel active regions extending in a first direction and having a top surface and sidewalls;
• a plurality of parallel word lines extending in a second direction and crossing over the plurality of parallel active;
• a plurality of charge storage layers between the plurality of parallel active regions and the plurality of parallel word lines;
• and
• a plurality of oxide layers contacting the plurality of charge storage layers at contact areas comprising first and second sides parallel to the second direction and having a first length, and comprising third and fourth sides parallel to the first direction and having a second length that is greater than the first length.

A nonvolatile memory device comprising:

• an active region in a substrate;
• a word line crossing over the active region at an intersecting location;
• and
• a charge storage layer disposed at the intersecting location between the active region and the word line,
• wherein the charge storage layer at the intersecting location has first and second opposing sides having a first length, and third and fourth opposing sides having a second length, wherein the first length is less than the second length.

A nonvolatile memory device comprising:

• a plurality of parallel active regions defined by a plurality of device isolation layers formed on a semiconductor substrate, each of the plurality of parallel active regions extending in a first direction;
• a plurality of parallel word lines extending in a second direction and crossing over the plurality of parallel active regions at intersecting locations;
• and
• a plurality of charge storage layers disposed between the plurality of parallel active regions and the plurality of parallel word lines at the intersecting locations, wherein the plurality of charge storage layers substantially overlap all of upper surfaces of the active regions at the intersecting locations,
• wherein each of the plurality of charge storage layers has a first side and a second side being parallel to the second direction and having a first length, and a third side and a fourth side being parallel to the first direction and having a second length, and
• wherein the first length is smaller than the second length.

A nonvolatile memory device comprising:

• an active region in a substrate;
• a word line crossing over the active region to define an intersecting location having a rectangular shaped projection onto the substrate;
• and
• a charge storage layer disposed at the intersecting location between the active region and the word line.