Method for producing multilayer wiring substrate and multilayer wiring substrate
AssigneeFUJIFILM Corporation
InventorMitsuyuki TSURUMI
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AssigneeFUJIFILM Corporation
InventorMitsuyuki TSURUMI
Estimating the term…
The present invention provides a method for producing a multilayer wiring substrate, including: forming a laminated body having an insulating resin layer and a polymer adhesive layer, on a surface of a first wiring substrate wherein the polymer adhesive layer contains a polymer precursor interacting with a plating catalyst or a precursor thereof, and a reactive group bonding with an adjacent layer on the first wiring substrate side; applying energy to a region outside of a via connection portion on the surface of the laminated body, to form a patterned polymer adhesive layer; applying a plating catalyst or a precursor thereof to the patterned polymer adhesive layer, and carrying out a first electroless plating, to form a second metal wiring on the surface of the patterned polymer adhesive layer; and forming a via by utilizing the patterned second metal wiring as a mask, and subsequently carrying out a desmear treatment.
A method for producing a multilayer wiring substrate, the method comprising:
A multilayer wiring substrate comprising a laminated body comprising an insulating resin layer and a patterned polymer adhesive layer, on a surface of a first wiring substrate comprising a metal wiring thereon, in which the patterned polymer adhesive layer comprises a polymer comprising a cyano group as a functional group that forms an interaction with a plating catalyst or a precursor thereof, wherein the laminated body comprises an adhesion auxiliary layer between the insulating resin layer and the patterned polymer adhesive layer, and the laminated body comprises a via portion which is not covered with the insulating resin layer and the patterned polymer adhesive layer, and a second metal wiring on a surface of the patterned polymer adhesive layer, and a ratio of Ra of the surface of the patterned polymer adhesive layer on the side of the second wiring to Ra of an inner face of the via portion is from 0.05 to 0.50.
Dependencies are inferred from the claim text.