Memory system
OwnerKoji HORISAKIinventor
Life of this patent
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Abstract
According to one embodiment, a memory system includes a semiconductor memory, a converter configured to convert an input data input from the semiconductor memory into a log likelihood ratio based on a conversion function, a conversion function optimizing unit configured to optimize the conversion function used for the converter, and a decoding operation unit configured to input the log likelihood ratio output from the converter to execute a decoding operation of an error correcting code. The conversion function optimizing unit optimizes the conversion function based on information related to a number of times of using the semiconductor memory.
Claims14
A memory system comprising:
- a semiconductor memory;
- a converter configured to convert an input data input from the semiconductor memory into a log likelihood ratio based on a conversion function;
- a conversion function optimizing unit configured to optimize the conversion function used for the converter;
- and
- a decoding operation unit configured to input the log likelihood ratio output from the converter to execute a decoding operation of an error correcting code,
- wherein the conversion function optimizing unit optimizes the conversion function based on information related to a number of times of using the semiconductor memory.
A memory system comprising:
- a semiconductor memory;
- a converter configured to convert an input data input from the semiconductor memory into a log likelihood ratio based on a conversion function;
- a conversion function optimizing unit configured to optimize the conversion function used for the converter;
- and
- a decoding operation unit configured to input the log likelihood ratio output from the converter to execute a decoding operation of an error correcting code,
- wherein the conversion function optimizing unit optimizes the conversion function based on information related to an elapsed time after the semiconductor memory is manufactured.
A memory system comprising:
- a semiconductor memory;
- a converter configured to convert an input data input from the semiconductor memory into a log likelihood ratio based on a conversion function;
- a conversion function optimizing unit configured to optimize the conversion function used for the converter;
- and
- a decoding operation unit configured to input the log likelihood ratio output from the converter to execute a decoding operation of an error correcting code,
- wherein the conversion function optimizing unit optimizes the conversion function based on information related to an elapsed time after write to the semiconductor memory is carried out.
A memory system comprising:
- a semiconductor memory;
- a converter configured to convert an input data input from the semiconductor memory into a log likelihood ratio based on a conversion function;
- a conversion function optimizing unit configured to optimize the conversion function used for the converter;
- and
- a decoding operation unit configured to input the log likelihood ratio output from the converter to execute a decoding operation of an error correcting code,
- wherein the conversion function optimizing unit optimizes the conversion function based on information related to a number of write times until a desired write voltage is obtained when write to the semiconductor memory is carried out.
A memory system comprising:
- a semiconductor memory;
- a converter configured to convert an input data input from the semiconductor memory into a log likelihood ratio based on a conversion function;
- a conversion function optimizing unit configured to optimize the conversion function used for the converter;
- and
- a decoding operation unit configured to input the log likelihood ratio output from the converter to execute a decoding operation of an error correcting code,
- wherein the conversion function optimizing unit optimizes the conversion function based on information related to a history of an error generation when the semiconductor memory is decoded.
A memory system comprising:
- a semiconductor memory;
- a semiconductor memory;
- a converter configured to convert an input data input from the semiconductor memory into a log likelihood ratio based on a conversion function;
- a conversion function optimizing unit configured to optimize the conversion function used for the converter;
- and
- a decoding operation unit configured to input the log likelihood ratio output from the converter to execute a decoding operation of an error correcting code,
- wherein the conversion function optimizing unit optimizes the conversion function based on information related to a history of a likelihood when the semiconductor memory is decoded.
A memory system comprising:
- a semiconductor memory;
- a converter configured to convert an input data input from the semiconductor memory into a log likelihood ratio based on a conversion function;
- a conversion function optimizing unit configured to optimize the conversion function used for the converter;
- and
- a decoding operation unit configured to input the log likelihood ratio output from the converter to execute a decoding operation of an error correcting code,
- wherein the conversion function optimizing unit optimizes the conversion function based on information related to a variation of the input data.
Dependencies are inferred from the claim text.