Non-regular parity distribution detection via metadata tag

A method for building a logical-to-physical mapping address table of a non-volatile memory (“NVM”), wherein the NVM comprises a plurality pages and wherein each page is associated with a unique physical address, the method comprising:

• processing a first page of the plurality of pages by:
• reading a first metadata tag of the first page, wherein the first metadata tag indicates whether or not the first page is a parity page;
• in response to determining the first metadata tag indicates the first page is not a parity page:
• determining a first logical address of the first page;
• and
• storing the first logical address with the first page's unique physical address in the logical-to-physical mapping address table;
• and
• in response to determining the first metadata tag indicates the first page is a parity page, skipping the first page such that the first logical address is not stored in the address table.

An electronic device comprising:

• a non-volatile memory (“NVM”) comprising a plurality of pages wherein:
• a subset of the plurality of pages are parity pages;
• and
• the plurality of pages are grouped into a plurality of codewords, each codeword of the plurality of codewords comprising at least two contiguous pages of the plurality of pages and comprising at least one parity page, and wherein at least a first subset of the plurality of codewords comprise at least two parity pages;
• and
• a processor for controlling access to the pages of the NVM, wherein the processor is configured to:
• mark a metadata field in each parity page to indicate the page is a parity page.