Bus Interface and Clock Frequency Control Method of Bus Interface
AssigneeNuvoton Technology Corporation
InventorChi-Ming CHEN
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AssigneeNuvoton Technology Corporation
InventorChi-Ming CHEN
Estimating the term…
A bus interface includes a chip select terminal, a first transmission bus terminal, a second transmission bus terminal, and a clock control device. The chip select terminal transmits a chip select signal to start the data transmission. When the data transmission starts, the first transmission bus terminal sends data to the second device, and the second transmission bus terminal sends the data from the second device to the first device. The clock control device includes a frequency processing unit and a transmission clock generating unit. The frequency processing unit outputs a clock control signal when a frequency to set value changes. The transmission clock generating unit receives the clock control signal and generates a transmission clock in accordance with the frequency setting value.
A bus interface electrically connected to a first device, wherein the bus interface comprises:
A bus interface electrically connected to a first device, wherein the bus interface comprises:
A clock frequency control method for adjusting a frequency of a transmission clock employed by a bus interface, comprising:
A clock frequency control method for adjusting a frequency of a transmission clock employed by a bus interface during packet group transmission, the method comprising:
Dependencies are inferred from the claim text.