Scheduling an application for performance on a heterogeneous computing system

A computer readable medium having stored thereon instructions, that when executed by a computer system, cause the computer system to:

• determine a priority order for two or more precedence constrained parallel tasks based on the computation and communication costs of the tasks;
• and
• in priority order of the tasks, assign each task both a processor and a voltage level that substantially minimises energy consumption and completion time for performing that task when compared to energy consumption and completion time for performing that task on different combinations of processor and voltage level.

A computer readable medium having stored thereon a schedule for performing an application on a heterogeneous computing system, the schedule comprising:

• a priority order for two or more precedence constrained parallel tasks based on the computation and communication costs of the tasks;
• and
• a processor and a voltage level assigned to each task, in priority order of the tasks, that substantially minimises energy consumption and completion time for performing a task when compared to energy consumption and completion time for performing the task on different combinations of processor and voltage level.

A scheduling system to schedule applications for performance on a heterogeneous computing system, wherein the application is comprised of two or more precedence constrained parallel tasks and the heterogeneous computing system is comprised of multiple processors each enabled to operate on different voltage supply levels, the scheduling module operable to:

• determine a priority order for the tasks based on the computation and communication costs of the tasks;
• and
• in priority order of the tasks, assign that task both a processor and a voltage level that substantially minimises energy consumption and completion time for performing that task when compared to assigning the task to energy consumption and completion time for performing that task on different combinations of processor and voltage level.