Data processor

A data processor comprising:

• a CPU operable to execute an instruction included in an instruction set;
• and
• an I/O device disposed in an I/O space managed by the CPU,
• wherein the instruction set includes an I/O read instruction for reading data from the I/O device,
• data read according to the I/O read instruction includes data of a format type having a data-read-branching-occurrence bit region to store a data-read-branching-occurrence bit in, and
• the CPU includes
• a data-read-branching control register for controlling whether to make the data-read-branching-occurrence bit valid or invalid,
• at least one data-read-branching address register operable to hold a data read branching address,
• a read-data-analyzing unit operable to perform an analysis for checking that a bit value showing occurrence of data read branching has been set on the data-read-branching-occurrence bit region, and that a value showing the data-read-branching-occurrence bit remaining valid has been set on the data-read-branching control register, and
• an instruction fetch unit operable to set, on a program counter, an address value stored in the at least one data-read-branching address register based on a result of the analysis by the read-data-analyzing unit, and to fetch an instruction based on an output value of the program counter.

A data processor comprising:

• a CPU operable to execute an instruction included in an instruction set;
• a data memory disposed in a memory space managed by the CPU, and
• an I/O device disposed in an I/O space managed by the CPU,
• wherein the instruction set includes a first instruction for reading data from the data memory, and a second instruction for reading data from the I/O device,
• data read according to one of the first and second instructions includes data of a format type having a data-read-branching-occurrence bit region to store a data-read-branching-occurrence bit in, and
• the CPU includes
• a data-read-branching control register for controlling whether to make the data-read-branching-occurrence bit valid or invalid,
• at least one data-read-branching address register operable to hold a data read branching address,
• a read-data-analyzing unit operable to perform an analysis for checking that a bit value showing occurrence of data read branching has been set on the data-read-branching-occurrence bit region, and that a value showing the data-read-branching-occurrence bit remaining valid has been set on the data-read-branching control register, and
• an instruction fetch unit operable to set, on a program counter, an address value stored in the at least one data-read-branching address register based on a result of the analysis by the read-data-analyzing unit, and to fetch an instruction based on an output value of the program counter.