Data processing device
AssigneeRenesas Electronics Corporation
InventorsSugako OHTANI, Hiroyuki Kondo
Life of this patent
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Abstract
A data processing device has an instruction decoder, a control logic unit, and ALU. The instruction decoder decodes instruction codes of an arithmetic instruction. The control logic unit detects the effective data width of operation data to be processed according to the decode result from the instruction decoder and determines the number of cycles for the instruction execution corresponding to the effective, data width. The ALU executes the instruction with the number of cycles of the instruction execution determined by the control logic unit.
Claims2
A method of execution of a divide instruction for a data processor, comprising the steps of:
- determining a data size of a dividend instructed in the divide instruction during an execution of the divide instruction, and
- executing a divide calculation based on the divide instruction,
- wherein a calculation cycle count of the divide calculation is determined depending on the data size of the dividend.
Dependencies are inferred from the claim text.