Memory devices with data protection
AssigneeMacronix International Co., Ltd.
InventorsYu-Lan Kuo, Chun-Yi Lee, Kuen-Long Chang, Chun-Hsiung Hung
Life of this patent
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Abstract
A memory device comprises a memory array, a status register, a status-register write-protect bit and a security register. The memory array contains a number of memory blocks. The status register includes at least one protection bit indicative of a protection status of at least one corresponding block of the memory blocks. The status-register write-protect bit is coupled with the status register for preventing a state change of the at least one protection bit. The security register includes at least one register-protection bit for preventing the state change in one of the at least one protection bit of the status register and the status-register write-protect bit.
Claims11
A memory device comprising:
- a memory array containing a number of memory blocks;
- a status register including at least one protection bit indicative of a protection status of at least one corresponding block of the memory blocks;
- a status-register write-protect bit coupled with the status register for preventing a state change of the at least one protection bit;
- and
- a security register including at least one register-protection bit for preventing the state change in one of the at least one protection bit of the status register and the status-register write-protect bit.
The memory device of claim 8, wherein the security register further comprises a security protection bit for controlling the change of contents in the secured area.
A memory device comprising:
- a first means including one protection element for showing a protection status of a block in a memory array;
- a first-means write-protect element for determining the changeability of the state of said protection element;
- and
- a second means including one register-protection element for determining the changeability in one of said first-means-write-protect element and said one protection element of the first means.
A memory device comprising:
- a memory array containing a number of memory blocks;
- a status register including at least one protection bit indicative of a write-protection status of at least one corresponding block of the memory blocks;
- and
- a security register coupled with the memory array and the status register, the security register including at least one register-protection bit for preventing the state change in one of the status-register write-protect bit and the at least one protection bit of the status register, and a security protection bit for controlling the change of contents in a secured area in the memory array.
Dependencies are inferred from the claim text.