Memory system
AssigneeKabushiki Kaisha Toshiba
InventorsMasahiro ABE, Kouhei Fujishige
Life of this patent
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Abstract
According to one embodiment, a memory system includes a memory that includes a plurality of parallel operation elements, each of which stores therein write data from a host device and on each of which read/write is individually performed, a control unit that performs the read/write to the parallel operation elements simultaneously, and a required-performance measuring unit that measures a required performance from the host device are included. The control unit changes the number of simultaneous executions of the read/write of the parallel operation elements based on the required performance measured by the required-performance measuring unit.
Claims21
A memory system comprising:
- a memory that includes a plurality of parallel operation elements, each of which stores write data from a host device and on each of which read/write is individually performed;
- a control unit that performs the read/write to the parallel operation elements simultaneously;
- and
- a required-performance measuring unit that measures a required performance from the host device, wherein
- the control unit changes number of simultaneous executions of the read/write of the parallel operation elements based on the required performance measured by the required-performance measuring unit.
A memory system comprising:
- a nonvolatile memory that stores write data from a host device;
- a control unit that performs read/write on the memory;
- a required-performance measuring unit that measures a required performance from the host device;
- a clock generating system that generates a plurality of types of clocks with different frequencies;
- and
- a clock selecting unit that selects one of the clocks and supplies selected clock to the memory and the control unit, wherein
- the control unit issues a selection signal that specifies one of the clocks based on the required performance measured by the required-performance measuring unit, and
- the clock selecting unit selects a clock based on the selection signal issued by the control unit.
A memory system comprising:
- a nonvolatile memory that stores write data from a host device;
- a volatile memory that includes a memory area in which the write data is cached and performs a refresh operation of the memory area;
- a control unit that controls a data transfer between the nonvolatile memory and the volatile memory;
- and
- a required-performance measuring unit that measures a required performance from the host device, wherein
- the control unit changes an area of a refresh operation target in the memory area by instructing the volatile memory based on the required performance measured by the required-performance measuring unit.
Dependencies are inferred from the claim text.