Control of processor cache memory occupancy
AssigneeVirtualMetrix, Inc.
InventorsGary Allen Gibson, Valeri Popescu
Life of this patent
Estimating the term…
Abstract
Techniques are described for controlling processor cache memory within a processor system. Cache occupancy values for each of a plurality of entities executing the processor system can be calculated. A cache replacement algorithm uses the cache occupancy values when making subsequent cache line replacement decisions. In some variations, entities can have occupancy profiles specifying a maximum cache quota and/or a minimum cache quota which can be adjusted to achieve desired performance criteria. Related methods, systems, and articles are also described.
Claims20
A method for controlling processor cache memory within a processor system, the method comprising:
- calculating, for each of a plurality of entities executing in the processor system, a cache occupancy value for the entity based on cache lines in the cache memory having identifiers associated with the entity;
- and
- replacing, using a cache replacement algorithm, cache lines in the cache memory required for execution of at least a portion of the entities based on the occupancy values.
A method comprising:
- monitoring performance of a plurality of entities in a processor system, each entity having an associated maximum quota specifying a maximum number of cache lines that the entity should occupy and an associated minimum quota specifying a minimum number of cache lines that the entity should occupy;
- monitoring, for each entity, a number of cache lines occupied by the entity;
- dynamically adjusting one or more of the maximum quota or the minimum quota for a entity if such entity is performing outside desired performance criteria;
- and
- replacing, using a cache replacement algorithm, cache lines in the cache memory, the cache replacement algorithm selecting cache lines to be replaced based on an number of cache lines occupied by a entity in relation to its associated maximum quota and/or its associated minimum quota.
A method for controlling execution of entities using cache memory within a processor system, the method comprising:
- monitoring performance of a plurality of entities;
- and
- selectively adjusting at least one of a minimum cache quota and a maximum cache quota for entities based on the monitoring.
Dependencies are inferred from the claim text.