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US 2011/0238203 A1Published application
Method and Apparatus to Provide a Clock Signal to a Charge Pump
AssigneeQUALCOMM Incorporated
InventorsWuyang Hao, Jung Pill Kim, Jungwon Suh
Life of this patent
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Abstract
A method and apparatus for providing a clock signal to a charge pump is disclosed. In a particular embodiment, the method includes providing a first clock signal to a first charge pump unit of a charge pump. The method further includes providing a second clock signal to a second charge pump unit of the charge pump. A low-to-high transition of the first clock signal occurs substantially concurrently with a high-to-low transition of the second clock signal. Only one clock signal may be at a logic high voltage level at any given time.
Claims44
A method comprising:
- providing a first clock signal to a first charge pump unit of a charge pump;
- and
- providing a second clock signal to a second charge pump unit of the charge pump, wherein a low-to-high transition of the first clock signal occurs substantially concurrently with a high-to-low transition of the second clock signal, wherein only one clock signal may be at a logic high voltage level at any given time.
A method comprising:
- providing a one-hot input clock signal to a charge pump having multiple charge pump units, wherein the one-hot input clock signal includes multiple clock signals comprising a first clock signal provided to a first charge pump unit of the multiple charge pump units and a second clock signal provided to a second charge pump unit of the multiple charge pump units, wherein each transition of the multiple clock signals results in at most one of the multiple clock signals having a logic high voltage level.
An apparatus comprising:
- logic circuitry configured to receive a multiphase clock output signal of a ring oscillator and to generate multiple input clock signals to drive a charge pump having multiple charge pump units, wherein the multiple input clock signals are configured such that each transition of each input clock signal occurs substantially concurrently with another transition of another input clock signal of the multiple input clock signals.
A computer readable tangible medium storing instructions executable by a computer, the instructions comprising:
- instructions that are executable by the computer to receive an enable signal to provide a first clock signal and a second clock signal to a charge pump, wherein each transition of each clock signal after a first transition of the first clock signal received at the charge pump occurs substantially concurrently with another transition of another clock signal received at the charge pump;
- and
- instructions that are executable by the computer to receive a disable signal to disable the first clock signal and the second clock signal to the charge pump, wherein a single falling edge transition is provided to the charge pump as a result of receiving the disable signal, wherein only one clock signal may be a logic high voltage level at any given time.
A method comprising:
- a first step for providing a first clock signal to a first charge pump unit of a charge pump;
- and
- a second step for providing a second clock signal to a second charge pump unit of the charge pump, wherein a low-to-high transition of the first clock signal occurs substantially concurrently with a high-to-low transition of the second clock signal.
An apparatus comprising:
- means for receiving a multiphase clock output signal of a ring oscillator and for generating multiple input clock signals to drive a charge pump having multiple charge pump units, wherein the multiple input clock signals are configured such that each transition of each input clock signal occurs substantially concurrently with another transition of another input clock signal of the multiple input clock signals.
A method comprising:
- receiving design information representing at least one physical property of a semiconductor device, the semiconductor device comprising:
- logic circuitry configured to receive a multiphase clock output signal of a ring oscillator and to generate multiple input clock signals to drive a charge pump having multiple charge pump units, wherein the multiple input clock signals are configured such that each transition of each input clock signal occurs substantially concurrently with another transition of another input clock signal of the multiple input clock signals;
- transforming the design information to comply with a file format;
- and
- generating a data file including the transformed design information.
2 more elements
A method comprising:
- receiving a data file comprising design information corresponding to a semiconductor device;
- and
- fabricating the semiconductor device according to the design information, wherein the semiconductor device comprises:
- logic circuitry configured to receive a multiphase clock output signal of a ring oscillator and to generate multiple input clock signals to drive a charge pump having multiple charge pump units, wherein the multiple input clock signals are configured such that each transition of each input clock signal occurs substantially concurrently with another transition of another input clock signal of the multiple input clock signals.
1 more element
A method comprising:
- receiving design information comprising physical positioning information of a packaged semiconductor device on a circuit board, the packaged semiconductor device comprising:
- logic circuitry configured to receive a multiphase clock output signal of a ring oscillator and to generate multiple input clock signals to drive a charge pump having multiple charge pump units, wherein the multiple input clock signals are configured such that each transition of each input clock signal occurs substantially concurrently with another transition of another input clock signal of the multiple input clock signals;
- transforming the design information to generate a data file.
Dependencies are inferred from the claim text.