Main spacer trim-back method for replacement gate process

A method of trimming back main nitride spacers of replacement gate structures on a substrate, comprising:

• forming main nitride spacers for replacement gate structures on the substrate, wherein the replacement gate structures have a high dielectric constant (high-K) dielectric layer, a dummy polysilicon layer over the high-K dielectric layer, and a hard mask with an oxide layer over a nitride layer;
• performing source and drain implants, wherein source and drain patterns are formed to allow source and drain implants to be performed on desired regions of the substrate and the source and drain patterns are removed from the substrate after the source and drain implants are performed;
• trimming back the main nitride spacers to increase a space between two adjacent replacement gate structures on the substrate to allow proper formation of metal silicide by subsequent processing and to increase contact yield;
• performing source and drain anneal;
• and
• forming the metal silicide on the substrate;
• wherein
• a thin oxide layer formed on the substrate as a result of the removal of the source and drain patterns, and
• the method further comprises removing the thin oxide layer before the main nitride spacers are trimmed back.

A method of trimming back main nitride spacers of replacement gate structures on a substrate, comprising:

• forming main nitride spacers for replacement gate structures on the substrate, wherein the replacement gate structures have a high dielectric constant (high-K) dielectric layer and a dummy polysilicon layer over the high-K dielectric layer, and a hard mask with an oxide layer over a nitride layer;
• performing source and drain implants, wherein source and drain patterns are formed to allow source and drain implants to be performed on desired regions of the substrate and the source and drain patterns are removed from the substrate after the source and drain implants are performed;
• performing first trim-back of the main nitride spacers to increase a space between two adjacent replacement gate structures on the substrate to allow proper formation of metal silicide by subsequent processing and to increase contact yield;
• performing source and drain anneal;
• implanting polysilicon on the substrate before the forming of the metal silicide, wherein the implanted polysilicon improves the quality of the metal silicide formed, and wherein the first trim-back of the main nitride spacers reduces shadowing effect of polysilicon implant;
• forming the metal silicide on the substrate;
• and
• performing second trim-back of the main nitride spacers to increase the space between two adjacent replacement gate structures on the substrate to further increase the contact yield.

A method of trimming back main nitride spacers of replacement gate structures on a substrate, comprising:

• forming main nitride spacers for replacement gate structures on the substrate, wherein the replacement gate structures have a high dielectric constant (high-K) dielectric layer, a dummy polysilicon layer over the high-K dielectric layer, and a hard mask with an oxide layer over a nitride layer;
• performing source and drain implants, wherein source and drain patterns are formed to allow source and drain implants to be performed on desired regions of the substrate and the source and drain patterns are removed from the substrate after the source and drain implants are performed;
• performing first trim-back of the main nitride spacers to increase a space between two adjacent replacement gate structures on the substrate to allow proper formation of metal silicide by subsequent processing;
• performing source and drain anneal;
• forming the metal silicide on the substrate;
• and
• performing second trim-back of the main nitride spacers to increase the space between two adjacent replacement gate structures on the substrate.