Dynamic random access memory and method of driving dynamic random access memory
AssigneeElite Semiconductor Memory Technology Inc.
InventorMin-Chung Chou
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AssigneeElite Semiconductor Memory Technology Inc.
InventorMin-Chung Chou
Estimating the term…
A dynamic RAM which includes a first inverter, a second inverter, a sense amplifier, a first pair of switches, a pair of bit lines, and a dynamic RAM cell. The first inverter receives a first driving signal. A power end of the first inverter is coupled to a first voltage source. The second inverter receives a second driving signal output from the first inverter. A power end of the second inverter is coupled to a second voltage source. The sense amplifier senses and amplifies a voltage difference between a first sensing signal and a second sensing signal. A power end of the sense amplifier is coupled to a third voltage source, wherein a voltage value of the second voltage source is between a voltage value of the first voltage source and a voltage value of the third voltage source.
A dynamic RAM, comprising:
A method of driving a dynamic RAM, wherein the dynamic RAM comprises a first inverter, a second inverter, a sense amplifier, a first pair of switches, a pair of data lines, and a dynamic RAM cell, the first inverter and the second inverter are coupled in series to drive the first pair of switches, the sense amplifier is coupled to the pair of data lines through the first pair of switches and to the dynamic RAM cell, the method comprises:
Dependencies are inferred from the claim text.