Method of erasing in non-volatile memory device
AssigneeSamsung Electronics Co., Ltd.
InventorsDoo-Gon Kim, Ki-Tae Park, Yeong-Taek Lee
Life of this patent
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Abstract
An erasing method of post-programming in a nonvolatile memory device. The method includes post-programming dummy memory cells; verifying whether threshold voltages of the dummy memory cells are greater than or equal to a first voltage; post-programming normal memory cells; and verifying whether threshold voltages of the normal memory cells are greater than or equal to a second voltage. The first voltage is different from the second voltage.
Claims21
1-49. (canceled)
An operating method of post-programming erased memory cells in a nonvolatile memory device, the method comprising:
- post-programming dummy memory cells;
- verifying threshold voltages of the dummy memory cells using a first voltage;
- post-programming normal memory cells;
- and
- wherein the post-programming of the dummy memory cells comprises:
- applying a program voltage to a plurality of dummy word lines coupled to the dummy memory cells to post-program the dummy memory cells;
- and
- applying a pass voltage less than the program voltage to a plurality of normal word lines coupled to the normal memory cells.
An operating method of post-programming erased memory cells in a nonvolatile memory device, the method comprising:
- post-programming dummy memory cells;
- verifying threshold voltages of the dummy memory cells using a first voltage;
- post-programming normal memory cells;
- and
- wherein the post-programming of the dummy memory cells comprises applying a program voltage to a plurality of dummy word lines coupled to the dummy memory cells to post-program the dummy memory cells, and
- wherein the plurality of dummy word lines includes at least a first dummy word line and a second dummy words line, the first dummy word line being coupled to a first dummy memory cell disposed between normal memory cells and a bit line, and a second dummy word line being coupled to a second dummy memory cell disposed between normal memory cells and a source line.
An operating method of post-programming erased memory cells in a nonvolatile memory device, the method comprising:
- post-programming a first normal memory cell, the first normal memory cell being connected to a first word line;
- verifying a threshold voltage of the first normal memory cell;
- post-programming a second normal memory cell after the post-programming of the first normal memory cell, the second memory cell being connected to a second world line different from the first word line;
- verifying the threshold voltage of the second normal memory cell.
Dependencies are inferred from the claim text.