US 2011/0234875 A1Published application

Solid-state imaging device

AssigneeKabushiki Kaisha Toshiba

InventorsMotohiro MAEDA, Hirofumi Yamashita, Nagataka Tanaka

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Abstract

According to one embodiment, a solid-state imaging device includes first and second pixel portions, first and second transfer transistors, first and second accumulation portions, an element isolation region, first and second amplifier transistors, and a first and second signal lines. The first and second pixel portions include photoelectric conversion elements, respectively. The first and second transfer transistors transfer first and second charges photoelectrically converted by the first and second pixel portions, respectively. The first and second accumulation portions are interposed between the first and second pixel portions, and accumulate the first and second charges, respectively. The element isolation region is interposed between the first and second accumulation portions. The first and second amplifier transistors amplify voltages generated in accordance with the first and second charges accumulated in the first and second accumulation portions, respectively. The first and second signal lines output signal voltages amplify by the amplifier transistors, respectively.

Claims14

Dependent claims

A solid-state imaging device comprising:

a first pixel portion including a photoelectric conversion element;
a second pixel portion which is arranged in a row direction with respect to the first pixel portion, the second pixel portion including a photoelectric conversion element;
a first transfer transistor configured to transfer a first charge photoelectrically converted by the first pixel portion;
a second transfer transistor configured to transfer a second charge photoelectrically converted by the second pixel portion;
a first accumulation portion which is interposed between the first pixel portion and the second pixel portion, the first accumulation portion accumulating the first charge transferred by the first transfer transistor;
a second accumulation portion which is interposed between the first pixel portion and the second pixel portion, the second accumulation portion accumulating the second charge transferred by the second transfer transistor;
an element isolation region which is interposed between the first accumulation portion and the second accumulation portion, The element isolation region electrically isolating the first accumulation portion from the second accumulation portion;
a first amplifier transistor configured to amplify a voltage generated in accordance with the first charge accumulated in the first accumulation portion;
a first signal line configured to output a signal voltage amplified by the first amplifier transistor;
a second amplifier transistor configured to amplify a voltage generated in accordance with the second charge accumulated in the second accumulation portion;
and
a second signal line configured to output a signal voltage amplified by the second amplifier transistor.

9 more elements

Dependencies are inferred from the claim text.

Facts

Application: 13/052,145Filed 21 Mar 2011
Priority: JP 2010-06694423 Mar 2010
Published: 29 Sep 2011
Term ends: Not estimatedThe source records don’t support an estimate.

Classification9 codes

H04N 25/778
Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components: comprising amplifiers shared between a…
H04N 25/134
Characterised by the spectral characteristics of the filter elements: based on three different wavelength filter elements
H04N 25/70
Circuitry of solid-state image sensors [SSIS]; Control thereof: sSIS architectures; Circuits associated therewith
H10F 39/802
Constructional details of image sensors: geometry or disposition of elements in pixels, e.g. address-lines or gate electrodes