Solid-state imaging device

A solid-state imaging device comprising:

• a pixel array in which a plurality of unit pixels are arranged in row and column directions, each of the unit pixel including a photodiode configured to perform photoelectric conversion, a read transistor configured to read a signal charge converted and accumulated in the photodiode to a floating diffusion, a reset transistor configured to set a voltage of the floating diffusion to a power source voltage, and an amplifying transistor in which the voltage of the floating diffusion is applied to a gate terminal and a power source voltage is applied to a power source terminal when a row of the unit pixel is selected;
• a plurality of vertical signal lines that are respectively arranged to columns of the pixel array and respectively connected to an output terminal of the amplifying transistor of each unit pixel in the column direction;
• a bias voltage generation circuit configured to generate a bias voltage applied to each of the plurality of vertical signal lines via a first switch;
• a plurality of current sources respectively connected between each of the plurality of vertical signal lines and a circuit ground via each second switch;
• a pixel driving circuit configured to, when reading a signal charge from the photodiode to the floating diffusion in each unit pixel in a row of the pixel array, perform a control that closes the plurality of second switches and causes the amplifying transistor to form a source follower circuit while the plurality of first switches are opened, turns on the reset transistor to connect a power source to the floating diffusion, opens the plurality of second switches to cancel the formed source follower circuit after turning off the reset transistor, closes the plurality of first switches to apply the bias voltage to the plurality of vertical signal lines, turns on the read transistor to read the signal charge to the floating diffusion, and thereafter, closes the plurality of second switches and causes the amplifying transistor to form a source follower circuit while the plurality of first switches are opened;
• and
• a column ADC configured to perform correlated double sampling processing on a pixel signal output from the floating diffusion to the plurality of vertical signal lines in a period in which the amplifying transistor forms a source follower circuit twice on the basis of two reference signals sequentially input from the pixel driving circuit, digitally convert the processing result into pixel data, and output the pixel data to a processing system, wherein
• the pixel driving circuit calculates analog gain information that fluctuates according to brightness of a subject from a previous frame output value from the column ADC, and outputs the analog gain information to the bias voltage generation circuit, and
• the bias voltage generation circuit generates a bias voltage by raising or lowering the bias voltage from a predetermined value in accordance with a comparison result of an analog gain indicated by the analog gain information and a reference value.