Amplifying circuit and analog-digital converting circuit including same

An analog-digital converter circuit comprising:

• a series of resistors coupled in series between a reference power supply and a ground power supply;
• comparators, each being coupled to one of connection points via which the resistors are coupled in series to compare a potential of an input signal with a potential of the connection point to which the corresponding comparator is coupled;
• and
• an encoder that outputs a digital signal corresponding to the potential of the input signal, in accordance with comparison results output from the comparators;
• wherein each comparator includes:
• a pair of MOS transistors having gate electrodes that receive the potential of the input signal and the potential of the connection point;
• an amplifier that is electrically coupled to drains of the pair of MOS transistors and a high-potential power-supply line to amplify a difference between potentials of differential output nodes electrically coupled to the corresponding drains of the pair of MOS transistors and to hold the amplified potential at the differential output nodes;
• offset cancel circuits that cause cancel current to flow to one of the differential output nodes when the amplifier amplifies a voltage between the differential output nodes and that shut off, after the amplifier performs the amplification operation, inflow of the cancel current to the differential output node in accordance with voltages of the drains of the pair of MOS transistors;
• and
• a threshold controller that performs setting so that the potentials of the input signal and the connection point are equal to each other, that compares, before the inflow of the cancel current, potentials generated at the differential output nodes when the difference between the potentials of the differential output nodes is amplified, and that sets the cancel current so that the potentials are reversed after the inflow of the cancel current.

An amplifying circuit comprising:

• a pair of MOS transistors having gate electrodes that receive differential input signals;
• an amplifier that is electrically coupled to drains of the pair of MOS transistors and a ground line to amplify a difference between potentials of differential output nodes electrically coupled to the corresponding drains of the pair of MOS transistors and to hold the amplified potential at the differential output nodes;
• offset cancel circuits that cause cancel current to flow to one of the differential output nodes when the amplifier amplifies a voltage between the differential output nodes and that shut off, after the amplifier performs the amplification operation, inflow of the cancel current to the differential output node in accordance with voltages of the drains of the pair of MOS transistors;
• and
• a threshold controller that performs setting so that potentials of first and second ones of the differential input signals are equal to each other, that compares, before the inflow of the cancel current, potentials generated at the differential output nodes when the difference between the potentials of the differential output nodes is amplified, and that sets the cancel current so that the potentials are reversed after the inflow of the cancel current.