Layout device and layout method of semiconductor integrated circuit

A tangible computer-readable medium including a computer program for a layout method of a semiconductor integrated circuit, comprising code operable to control a computer, the code comprising:

• extracting a wiring crowding place where wiring lines are crowded as compared with a predetermined condition, after carrying out a routing in a region where a placement of circuit elements of said semiconductor integrated circuit is carried out;
• generating a plurality of routing prohibit ion regions where a routing is prohibited in an area including said wiring crowding place;
• carrying out a routing by bypassing said plurality of routing prohibition regions;
• deleting said plurality of routing prohibition regions after said carrying out routing step;
• and
• carrying out a re-routing after said deleting step,
• wherein said generating step includes:
• calculating a size and an interval of said plurality of routing prohibition regions based on a rate for generating a routing prohibition region in said area in each wiring layer, and
• generating said plurality of routing prohibition regions in said area on the basis of said calculating result.

A layout device of a semiconductor integrated circuit, comprising:

• a crowding extraction and determination portion configured to extract a wiring crowding place where wiring lines are crowded as compared with a predetermined condition, after carrying out a routing in a region where a placement of circuit elements of said semiconductor integrated circuit is carried out;
• a prohibition region generating portion configured to generate a plurality of routing prohibition regions where a routing is prohibited in an area including said wiring crowding place;
• a routing re-estimation portion configured to carry out a routing by bypassing said plurality of routing prohibition regions;
• a prohibition region deletion portion configured to delete said plurality of routing prohibition regions after said routing by bypassing is carried out;
• and
• a re-routing portion configured to carry out a re-routing after said plurality of routing prohibition regions is deleted,
• wherein said prohibition region generating portion includes:
• a prohibition region calculating portion configured to calculate a size and an interval of said plurality of routing prohibition regions based on a rate for generating a routing prohibition region in said area in each wiring layer, and
• a prohibition region generating portion configured to generate said plurality of routing prohibition regions in said area on the basis of said calculating result.