Design Rule Optimization in Lithographic Imaging Based on Correlation of Functions Representing Mask and Predefined Optical Conditions

A computer program product comprising a computer-readable medium having instructions recorded therein, which when executed, cause the computer to generate files corresponding to a mask layout having a plurality of polygons to be imaged by a lithographic apparatus, the generation of the files comprising the steps of:

• selecting an initial design rule for the mask layout;
• selecting an autocorrelation function associated with a predefined optical condition of the lithographic apparatus;
• selecting respective diffraction order functions for at least two polygons in the mask layout;
• determining a desired distance between the at least two polygons by cross-correlating the diffraction order functions and the autocorrelation function;
• and
• updating the initial design rule to generate the updated design rule based on the determined value of the desired distance between the at least two polygons.

A method of generating a design rule defining relative positioning of polygons in an integrated circuit design, the design rule being usable for producing a mask layout for a mask for a lithographic apparatus comprising predefined optical conditions, the method comprising the steps of:

• calculating an image log slope (ILS) of an intensity profile at an edge of a calculated image of a first polygon including a contribution of a calculated image of a further polygon located at a distance ‘a0’, the first polygon and the further polygon being part of the integrated circuit design, the image log slope comprising an autocorrelation function associated with the predefined optical conditions multiplied with respective diffraction order functions for the first polygon and the further polygon;
• calculating a value of the distance ‘a0’ being a desired distance in which variation of the image log slope (ILS) with the distance is minimal;
• and
• generating the design rule using the desired distance ‘a0’ for repositioning at least one of the first and further polygons in the integrated circuit design.