US 2011/0219284 A1 · NONVOLATILE SEMICONDUCTOR MEMORY SYSTEM

Abstract

A nonvolatile semiconductor memory system includes a semiconductor memory, at least one first error correction unit and at least one second error correction unit. The semiconductor memory stores a data frame encoded with LDPC codes. The at least one first error correction unit performs a first error correction for the data frame according to a first iterative decoding algorithm. The at least one second error correction unit performs a second error correction for the data frame which is failed to correct error by the at least one first error correction unit. The at least one second error correction unit performs the second error correction according to a second iterative decoding algorithm which uses a message having a larger number of quantization bits than that of the first iterative decoding algorithm.

Claims5

Dependent claims

A nonvolatile semiconductor memory system, comprising:

a semiconductor memory to store a data frame encoded with LDPC codes;
at least one first error correction unit configured to perform a first error correction for the data frame according to a first iterative decoding algorithm;
and
at least one second error correction unit configured to perform a second error correction for the data frame which is failed to correct error by the at least one first error correction unit, the second error correction being performed according to a second iterative decoding algorithm which uses a message having a larger number of quantization bits than that of the first iterative decoding algorithm.

1 more element

Dependencies are inferred from the claim text.

Nonvolatile semiconductor memory system

Life of this patent

Nonvolatile semiconductor memory system

Life of this patent

Abstract

Claims5