Flash-based memory system with robust backup and restart features and removable modules

A Flash-based memory system having a backup power source, comprising:

• a printed circuit board (PCB);
• a plurality of Flash memory devices mounted to the PCB, each Flash memory device having a physical memory space that is divided into blocks, each block being further divided into pages, each page representing an individually addressable memory location on which memory operations are performed, multiple memory locations being erased at the same time in one-block groupings;
• a Flash controller mounted to the PCB and communicating independently with each Flash memory device to perform the memory operations;
• a power circuit mounted to the PCB and providing power to at least the Flash memory devices, the power being provided from a primary power source during normal operation of the Flash-based memory system and from a backup power source when the primary power source falls below a predefined level, the backup power source including a charge storage device and charging circuitry configured to charge the charge storage device;
• and
• a central processing unit (CPU) mounted to the PCB and coupled to the power circuit and the Flash controller, the CPU configured to perform one or more test procedures on the charge storage device and provide an indication of a charge storage capacity of the charge storage device, the one or more test procedures comprising:
• a) disabling the charging circuitry from charging the charge storage device;
• b) obtaining a first voltage measurement from the charge storage device;
• c) applying a predefined load to the charge storage device;
• d) obtaining a second voltage measurement from the charge storage device;
• e) waiting a predefined amount of time;
• and
• f) obtaining a third voltage measurement from the charge storage device;
• wherein the CPU provides an indication of the charge storage capacity of the charge storage device by providing at least one of a capacitance C of the charge storage device and an equivalent series resistance (ESR) of the charge storage device based on one or more of the first, second, and third voltage measurements.

A Flash-based memory module, comprising:

• a plurality of input/output (I/O) modules, each I/O module configured to communicate with an external device over one or more external communication links;
• a plurality of cross-bar switching elements, each crossbar switching element connected to and in communication with one or more of the I/O modules;
• and
• a plurality of Flash-based memory cards connected to and in communication with each crossbar switching element, each Flash-based memory card having a printed circuit board (PCB) and a plurality of Flash-based memory systems mounted on the PCB, wherein each Flash-based memory system comprises:
• a) a plurality of Flash memory devices, each Flash memory device having a physical memory space that is divided into blocks, each block being further divided into pages, each page representing an individually addressable memory location on which memory operations are performed, multiple memory locations being erased at the same time in one-block groupings;
• b) a Flash controller communicating independently with each Flash memory device to perform the memory operations, the Flash controller configured to access a logical-to-physical translation table that associates a logical address of a memory operation with a physical address of a memory location;
• c) a power circuit configured to provide primary power to at least the plurality of Flash memory devices and, upon failure of the primary power, provide backup power to at least the plurality of Flash memory devices;
• and
• d) a central processing unit (CPU) coupled to the power circuit and the Flash controller, the CPU configured to perform a data backup procedure on selected data in the Flash-based memory system and a controlled powering down procedure on the Flash memory devices when failure of the primary power is detected.