Atomicity: a multi-pronged approach

A system comprising:

• a plurality of processors adapted to issue atomicity related operations including
• at least one atomic instruction that includes sub-operations, the sub-operations including a read, a modify, and a write;
• at least one other type of atomicity related operation;
• at least one cache memory comprising:
• a cache data array access pipeline;
• and
• at least one controller adapted to prevent the other types operations from entering the cache data array access pipeline, responsive to the atomic instruction in the pipeline, when those other types of operation compete with the atomic instruction in the pipeline for a memory resource.

A multiprocessor system comprising:

• a plurality of processors adapted to implement parallel speculative execution of program threads, the processors being adapted to implement a plurality of atomicity related techniques;
• a central conflict checking mechanism adapted to resolve conflicts between the threads;
• and
• conflict resolution protocol apparatus adapted to prioritize at least one atomicity related technique over at least one other atomicity related technique.

A computer method comprising:

• issuing an atomic instruction from a processor in a multi-processor system, the atomic instruction defining sub-operations that include loading, modifying, and storing with respect to a memory resource;
• recognizing the atomic instruction in a directory based conflict checking mechanism;
• and
• blocking other functions that seek to access the memory resource, until the atomic instruction has completed.